An analog-to-digital converter (ADC) is a system that converts an analog input signal into a digital output signal. One way to achieve such analog to digital conversion is by using a successive approximation analog-to-digital converter (SAR ADC). A SAR ADC performs successive comparison of input voltage signals to generated analog signals at each conversion cycle. The result of each comparison is used to generate the final outputs of digital signal, which is the digital representation of the analog input voltage signal. In a SAR ADC (including synchronous and asynchronous), a slicer (also known as quantizer or comparator) determines the polarity of input voltage signals and a capacitive digital-to-analog converter (CDAC) produces submultiple of reference voltages in consecutive cycles. The reference voltages provided by the CDAC may be added or subtracted from the input voltage where the SAR ADC may choose to perform top plate sampling.
In high speed and low power application, asynchronous signal processing is advantageous over synchronous signal processing because it is simple and faster. However, current asynchronous signal processing in conventional SAR ADCs is inefficient for ultra-high speed application because there exist critical path delays such as processing time of multiple memory elements (e.g. flip flops). Thus, it would be desirable to have a method and apparatus that provides ultra-high speed asynchronous signal processing by reducing the critical path delays.